alexcrichton opened PR #12907 from alexcrichton:fix-aarch64-extr to bytecodealliance:main:
This commit fixes a miscompile in the lowering of the
extrinstruction for the aarch64 backend where one of the shift operands is 0. In this edge case the generatedextrinstruction did not match the input CLIF semantics, calculating a different value. The fix here is to only use theextrinstruction when both immediates are larger than 0.<!--
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alexcrichton requested wasmtime-compiler-reviewers for a review on PR #12907.
alexcrichton requested fitzgen for a review on PR #12907.
alexcrichton requested wasmtime-core-reviewers for a review on PR #12907.
cfallin submitted PR review:
Good find!
cfallin added PR #12907 aarch64: Fix miscompile lowering the extr instruction to the merge queue.
cfallin merged PR #12907.
cfallin removed PR #12907 aarch64: Fix miscompile lowering the extr instruction from the merge queue.
Last updated: Apr 12 2026 at 23:10 UTC