fitzgen opened PR #12116 from fitzgen:revert-isle-rule to bytecodealliance:main:
This reverts commit 72534b0f9783570936c83e291e1abdbe7f5e6793.
This mid-end rule was shown to be the root cause of a codegen regression in https://github.com/bytecodealliance/wasmtime/issues/12106 and we didn't have any real examples that would improve from this rule, just a theoretical idea of its benefit. Better to do actual instruction scheduling while lowering and/or during regalloc than to do hack-y instruction scheduling in the mid-end (where we have no idea how many registers are available, for example).
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fitzgen requested wasmtime-compiler-reviewers for a review on PR #12116.
fitzgen requested alexcrichton for a review on PR #12116.
fitzgen requested cfallin for a review on PR #12116.
github-actions[bot] commented on PR #12116:
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cfallin submitted PR review:
LGTM, thanks!
(Looks like some disas tests will need re-blessing as well to pass CI.)
fitzgen updated PR #12116.
fitzgen requested wasmtime-core-reviewers for a review on PR #12116.
fitzgen requested pchickey for a review on PR #12116.
fitzgen has enabled auto merge for PR #12116.
fitzgen merged PR #12116.
Last updated: Dec 06 2025 at 07:03 UTC