Stream: git-wasmtime

Topic: wasmtime / PR #11708 Add support for bitwise operations o...

Wasmtime GitHub notifications bot (Sep 17 2025 at 23:30):

Wardenfar opened PR #11708 from Wardenfar:support_bitwise_op_vector64 to bytecodealliance:main:

his PR adds support for emitting bitwise operations using 64-bit vectors on AArch64.

Before this change, the following function would produce an error during compilation:

function %band_i8x8(i8x8, i8x8) -> i8x8 {
block0(v0: i8x8, v1: i8x8):
    v2 = band v0, v1
    return v2
}

The error:

thread panicked at [...]/regalloc2-0.13.1/src/lib.rs:642:17:
assertion `left == right` failed
  left: Float
 right: Int

The operand is a vector with a total size of 64 bits. When lowering this operation, it produces a machine instruction that expects a 64-bit integer.

I've also added support for lowering and emitting the ORN instruction.

Wasmtime GitHub notifications bot (Sep 17 2025 at 23:30):

Wardenfar requested cfallin for a review on PR #11708.

Wasmtime GitHub notifications bot (Sep 17 2025 at 23:30):

Wardenfar requested wasmtime-compiler-reviewers for a review on PR #11708.

Wasmtime GitHub notifications bot (Sep 17 2025 at 23:31):

Wardenfar edited PR #11708:

This PR adds support for emitting bitwise operations using 64-bit vectors on AArch64.

Before this change, the following function would produce an error during compilation:

function %band_i8x8(i8x8, i8x8) -> i8x8 {
block0(v0: i8x8, v1: i8x8):
    v2 = band v0, v1
    return v2
}

The error:

thread panicked at [...]/regalloc2-0.13.1/src/lib.rs:642:17:
assertion `left == right` failed
  left: Float
 right: Int

The operand is a vector with a total size of 64 bits. When lowering this operation, it produces a machine instruction that expects a 64-bit integer.

I've also added support for lowering and emitting the ORN instruction.

Wasmtime GitHub notifications bot (Sep 17 2025 at 23:53):

cfallin submitted PR review:

Thanks! A few nits below but otherwise LGTM, and I appreciate the thorough tests; happy to merge once the below are addressed.

Wasmtime GitHub notifications bot (Sep 17 2025 at 23:53):

cfallin created PR review comment:

For a small-enough enum like this, to avoid any surprises in the future (e.g., add 256-bit vectors and mistake "not 128 bits" as meaning 64 bits rather than 256), I'd prefer a full match over all cases if possible; or alternately, a match on number of bits, and a separate bits method that has a full match.

Wasmtime GitHub notifications bot (Sep 17 2025 at 23:53):

cfallin created PR review comment:

I know it's pre-existing but could we leave a comment here why we special-case the size? IIRC, it's because that's the only supported case, and for bitwise operators it doesn't matter what we consider the lane divisions?

Wasmtime GitHub notifications bot (Sep 19 2025 at 18:37):

Wardenfar updated PR #11708.

Wasmtime GitHub notifications bot (Sep 19 2025 at 18:38):

Wardenfar submitted PR review.

Wasmtime GitHub notifications bot (Sep 19 2025 at 18:38):

Wardenfar created PR review comment:

good catch :)

Wasmtime GitHub notifications bot (Sep 19 2025 at 18:40):

Wardenfar commented on PR #11708:

I made the 2 requested changes

Wasmtime GitHub notifications bot (Sep 21 2025 at 02:06):

cfallin submitted PR review:

Thanks!

Wasmtime GitHub notifications bot (Sep 21 2025 at 02:29):

cfallin merged PR #11708.

Last updated: Dec 06 2025 at 06:05 UTC