Wasmtime GitHub notifications bot (May 22 2025 at 20:00): Wasmtime GitHub notifications bot (May 22 2025 at 20:00):alexcrichton opened PR #10825 from alexcrichton:x64-lane-instructions to bytecodealliance:main:
This was mostly straightforward but ended up requiring handling for a new style of instruction not previously before-seen: a write-only
GprMemoperand. This needed some extra treatment/helpers in the ISLE integration to ensure that this was all hooked up correctly from ISLE constructors down to the assembler instructions.<!--
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Wasmtime GitHub notifications bot (May 22 2025 at 20:00):alexcrichton requested wasmtime-compiler-reviewers for a review on PR #10825.
Wasmtime GitHub notifications bot (May 22 2025 at 20:00):alexcrichton requested abrown for a review on PR #10825.
Wasmtime GitHub notifications bot (May 22 2025 at 20:19):alexcrichton updated PR #10825.
Wasmtime GitHub notifications bot (May 22 2025 at 20:21):alexcrichton updated PR #10825.
Wasmtime GitHub notifications bot (May 22 2025 at 21:45):github-actions[bot] commented on PR #10825:
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Wasmtime GitHub notifications bot (May 23 2025 at 21:17):abrown submitted PR review:
Let's do it! I struggled a bit over how this emits ISLE for write-only reg-mem operands; when and how we are emitting certain things can get a bit confusing (e.g., how we're intermixing this all with the trap codes). I concluded, though, that this is creating the constructors we would expect, even if it isn't particularly clear. And we can always refactor this later. Thanks for figuring this stuff out!
Wasmtime GitHub notifications bot (May 23 2025 at 21:38):abrown merged PR #10825.
Last updated: Dec 06 2025 at 06:05 UTC