abrown opened PR #10446 from abrown:asm-alignment
to bytecodealliance:main
:
This change improves the definitions of the assembler's SSE instructions in two ways:
- vector instructions that require aligned memory accesses (i.e., most everything pre-AVX) are now noted with an
align
attribute in the AST. This is used for generating the expectedXmmMemAligned
types incranelift-codegen-meta
the "right way," resolving the temporary fix introduced in #10417.- previously-added vector instructions did not have the correct feature flags; this change adds the
sse
feature and also tags the applicable instructions with thecompat
feature to allow their use in some future 32-bit target.<!--
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abrown requested cfallin for a review on PR #10446.
abrown requested wasmtime-compiler-reviewers for a review on PR #10446.
cfallin submitted PR review:
LGTM, thanks!
cfallin created PR review comment:
Should we dedup here (e.g. check if in list already before adding)?
abrown updated PR #10446.
abrown has enabled auto merge for PR #10446.
abrown merged PR #10446.
Last updated: Apr 18 2025 at 10:03 UTC