MarinPostma requested fitzgen for a review on PR #10039.
MarinPostma opened PR #10039 from MarinPostma:winch-x64-rmw-cmpxchg
to bytecodealliance:main
:
This PR implements atomic CAS operations for winch x64 backend:
i32.atomic.rmw8.cmpxchg_u
i32.atomic.rmw16.cmpxchg_u
i32.atomic.rmw.cmpxchg
i64.atomic.rmw8.cmpxchg_u
i64.atomic.rmw16.cmpxchg_u
i64.atomic.rmw32.cmpxchg_u
i64.atomic.rmw.cmpxchg
#9734
MarinPostma requested wasmtime-compiler-reviewers for a review on PR #10039.
MarinPostma requested wasmtime-core-reviewers for a review on PR #10039.
MarinPostma updated PR #10039.
github-actions[bot] commented on PR #10039:
Subscribe to Label Action
cc @saulecabrera
<details>
This issue or pull request has been labeled: "winch"Thus the following users have been cc'd because of the following labels:
- saulecabrera: winch
To subscribe or unsubscribe from this label, edit the <code>.github/subscribe-to-label.json</code> configuration file.
Learn more.
</details>
saulecabrera commented on PR #10039:
I'll take a look at this one.
saulecabrera requested saulecabrera for a review on PR #10039.
MarinPostma updated PR #10039.
saulecabrera submitted PR review:
I believe we can now enable the remaining spec tests? https://github.com/bytecodealliance/wasmtime/blob/02ff25115176e04ceac14daf88166961a5fe6c91/crates/wast-util/src/lib.rs#L373
saulecabrera created PR review comment:
I'd suggest materializing these values to registers via
pop_to_reg
instead of popping the raw value here: if these values are memory addresses, thepush
that happens below has the potential to break the stack ordering invariant if any spills happen duringself.emit_compute_heap_address_align_checked
. Meaning that values will no longer be stored from oldest to newest.
saulecabrera created PR review comment:
I believe we need to check if we actually need to make the zero extension? Similar to all the other cases?
if !(extend.from_bits() == 32 && extend.to_bits() == 64) {..}
MarinPostma updated PR #10039.
MarinPostma updated PR #10039.
MarinPostma updated PR #10039.
MarinPostma submitted PR review.
MarinPostma created PR review comment:
i didn't think about that. It seems quite wasteful now that I think about it. If i understand correctly,
rax
will always be allocated by the time we popexpected
: either byreplacement
or by a previous instruction. This means thatxcmpchg
will unconditionally spill all registers to the stack.
MarinPostma commented on PR #10039:
a test is failing with the newly enabled
atomic.wast
spec test. Looking into it.
MarinPostma commented on PR #10039:
@saulecabrera we need to merge this one first: https://github.com/bytecodealliance/wasmtime/pull/10060
MarinPostma updated PR #10039.
MarinPostma updated PR #10039.
MarinPostma updated PR #10039.
MarinPostma updated PR #10039.
MarinPostma updated PR #10039.
MarinPostma commented on PR #10039:
@saulecabrera fixed the tests here, but I ultimately had to disable
atomic.wast
, because we're missingnotify
saulecabrera commented on PR #10039:
@saulecabrera fixed the tests here, but I ultimately had to disable
atomic.wast
, because we're missingnotify
Right, I forgot to include those in the issue. It should now be up to date.
saulecabrera submitted PR review:
LGTM!
saulecabrera merged PR #10039.
Last updated: Jan 24 2025 at 00:11 UTC