Stream: git-wasmtime

Topic: wasmtime / Issue #2077 Implement Wasm Atomics for Craneli...

view this post on Zulip Wasmtime GitHub notifications bot (Jul 29 2020 at 09:49):

github-actions[bot] commented on Issue #2077:

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view this post on Zulip Wasmtime GitHub notifications bot (Jul 29 2020 at 16:00):

julian-seward1 commented on Issue #2077:

On further reflection, I am inclined to rename two of the new AArch64
instructions so as to be more consistent with CLIF. At the CLIF level, the
patch adds 5 new instructions:

  atomic_rmw, atomic_cas, atomic_load, atomic_store, fence

At the AArch64 level, the corresponding new instructions are

  LLSC, CAS, AtomicLoad, AtomicStore, Fence.

I am thinking these should actually be

  AtomicRMW, AtomicCAS, AtomicLoad, AtomicStore, Fence.

Implying, via the name, that the first of these (LLSC) contains an LL-SC loop
is misleading, since any atomic modification of memory will require use of LL
and SC. CAS also uses LL and SC, for example. Also, it would be better not
to imply the use of LL and SC at all, since some AArch64 revisions after 8.0
support compare-and-swap directly (I think), and so we could emit those
differently on such targets in future.

Reviewers: any objections to the proposed renaming?

view this post on Zulip Wasmtime GitHub notifications bot (Jul 29 2020 at 16:55):

cfallin commented on Issue #2077:

+1 to the proposed Inst names. In particular AtomicLLSC -> AtomicRMW; the latter corresponds to the actual semantics, the former is an implementation detail.

view this post on Zulip Wasmtime GitHub notifications bot (Jul 29 2020 at 16:56):

cfallin edited a comment on Issue #2077:

+1 to the proposed Inst names. In particular LLSC -> AtomicRMW; the latter corresponds to the actual semantics, the former is an implementation detail.

Last updated: Dec 23 2024 at 12:05 UTC