jlb6740 opened Issue #1943:
@bnjbvr @julian-seward1
Hi, I believe the recent patch https://github.com/bytecodealliance/wasmtime/pull/1915 introduce different behavior with register allocation. Before the patch a floating point add lowered to this:
Disassembly of 10 bytes:
0: 55 push rbp
1: 48 89 e5 mov rbp, rsp
4: f3 0f 58 c1 addss xmm0, xmm1
8: 5d pop rbp
9: c3 retBut afterwards it lowered to this:
Disassembly of 18 bytes:
0: 55 push rbp
1: 48 89 e5 mov rbp, rsp
4: f3 0f 10 c8 movss xmm1, xmm0
8: f3 0f 58 c8 addss xmm1, xmm0
c: f3 0f 10 c1 movss xmm0, xmm1
10: 5d pop rbp
11: c3 retIt is not clear to me what change in this patch introduces these moves nor how to fix them. Any suggestions?
bnjbvr commented on Issue #1943:
Weird,
Inst::is_move
should identify the movss instructions as moves, unless we missed something when rejiggering the float moves.
bjorn3 commented on Issue #1943:
asm 4: f3 0f 10 c8 movss xmm1, xmm0 8: f3 0f 58 c8 addss xmm1, xmm0 c: f3 0f 10 c1 movss xmm0, xmm1
This is equivalent to
xmm0 = xmm0 + xmm0
, notxmm0 = xmm0 + xmm1
like it was before.
bjorn3 commented on Issue #1943:
I think I found the problem: https://github.com/bytecodealliance/wasmtime/pull/1915/files#r447576280
julian-seward1 commented on Issue #1943:
Yeah, I can believe that explanation. It will have messed up the live ranges, which will have (correctly) defeated the RA's coalescer, hence the extra moves, and the incorrect resulting computation.
Last updated: Dec 23 2024 at 12:05 UTC