Stream: git-wasmtime

Topic: wasmtime / Issue #1497 Cranelift: express x86 callee-save...


view this post on Zulip Wasmtime GitHub notifications bot (Apr 10 2020 at 20:45):

iximeow opened Issue #1497:

In isa/x86/abi.rs, callee-save FPRs are represented as F64. In the only ABI we currently support with callee-save FPRs, we preserve xmm registers, which should be written more specifically as F64x2 or some other equivalently-sized type. F64 gets correct codegen out at the moment, but some optimization that tries to be clever about only preserving the low 64 bits of a callee-save register might break this in the future. It also would make the code less surprising by removing a point of confusion for the reader :)

See here, here, and here.

This was done at the time because of a missing fstDisp8 encoding allowing a REX prefix. Such an encoding might have been added in the intervening time, so hopefully this is a very simple change.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 10 2020 at 20:46):

iximeow labeled Issue #1497:

In isa/x86/abi.rs, callee-save FPRs are represented as F64. In the only ABI we currently support with callee-save FPRs, we preserve xmm registers, which should be written more specifically as F64x2 or some other equivalently-sized type. F64 gets correct codegen out at the moment, but some optimization that tries to be clever about only preserving the low 64 bits of a callee-save register might break this in the future. It also would make the code less surprising by removing a point of confusion for the reader :)

See here, here, and here.

This was done at the time because of a missing fstDisp8 encoding allowing a REX prefix. Such an encoding might have been added in the intervening time, so hopefully this is a very simple change.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 10 2020 at 20:46):

iximeow labeled Issue #1497:

In isa/x86/abi.rs, callee-save FPRs are represented as F64. In the only ABI we currently support with callee-save FPRs, we preserve xmm registers, which should be written more specifically as F64x2 or some other equivalently-sized type. F64 gets correct codegen out at the moment, but some optimization that tries to be clever about only preserving the low 64 bits of a callee-save register might break this in the future. It also would make the code less surprising by removing a point of confusion for the reader :)

See here, here, and here.

This was done at the time because of a missing fstDisp8 encoding allowing a REX prefix. Such an encoding might have been added in the intervening time, so hopefully this is a very simple change.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 10 2020 at 20:46):

github-actions[bot] commented on Issue #1497:

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view this post on Zulip Wasmtime GitHub notifications bot (Apr 11 2020 at 05:55):

samrat commented on Issue #1497:

Hello! I would like to take a stab at this issue. I'm fairly new to the codebase though, so I'll probably need to spend some time familiarizing myself with how codegen works in Cranelift.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 13 2020 at 16:48):

iximeow closed Issue #1497:

In isa/x86/abi.rs, callee-save FPRs are represented as F64. In the only ABI we currently support with callee-save FPRs, we preserve xmm registers, which should be written more specifically as F64x2 or some other equivalently-sized type. F64 gets correct codegen out at the moment, but some optimization that tries to be clever about only preserving the low 64 bits of a callee-save register might break this in the future. It also would make the code less surprising by removing a point of confusion for the reader :)

See here, here, and here.

This was done at the time because of a missing fstDisp8 encoding allowing a REX prefix. Such an encoding might have been added in the intervening time, so hopefully this is a very simple change.


Last updated: Dec 23 2024 at 12:05 UTC