Wasmtime GitHub notifications bot (Mar 16 2020 at 22:24): Wasmtime GitHub notifications bot (Mar 16 2020 at 22:24):fitzgen opened Issue #1331:
This test case, produced by
wasm-opt -ttf, produces different results for function 5 when compiled with speed-and-size optimizations vs without any optimizations:<details><summary>WAT test case</summary>
(module (type (;0;) (func)) (type (;1;) (func (param i32))) (type (;2;) (func (param i64))) (type (;3;) (func (param f32))) (type (;4;) (func (param f64))) (type (;5;) (func (result i32))) (type (;6;) (func (param f64 i64 i32 i64 f32) (result f64))) (import "fuzzing-support" "log-i32" (func (;0;) (type 1))) (import "fuzzing-support" "log-i64" (func (;1;) (type 2))) (import "fuzzing-support" "log-f32" (func (;2;) (type 3))) (import "fuzzing-support" "log-f64" (func (;3;) (type 4))) (func (;4;) (type 5) (result i32) (local i32) i32.const 5381 local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=1 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=2 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=3 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=4 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=5 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=6 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=7 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=8 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=9 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=10 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=11 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=12 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=13 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=14 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=15 i32.xor local.set 0 local.get 0) (func (;5;) (type 6) (param f64 i64 i32 i64 f32) (result f64) (local i32 i64 i64 f32 f64 f64) block ;; label = @1 global.get 4 i32.eqz if ;; label = @2 f64.const 0x1.00000002p+31 (;=2147483649;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @1 loop ;; label = @2 block ;; label = @3 global.get 4 i32.eqz if ;; label = @4 f64.const 0x1.dcp+6 (;=119;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @3 block ;; label = @4 loop ;; label = @5 block ;; label = @6 global.get 4 i32.eqz if ;; label = @7 local.get 9 return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @6 block ;; label = @7 local.get 5 local.tee 2 local.tee 2 local.tee 5 local.tee 2 local.tee 5 local.tee 5 local.tee 2 local.tee 2 local.set 5 loop (result f32) ;; label = @8 block ;; label = @9 global.get 4 i32.eqz if ;; label = @10 f64.const -nan:0xfffffffffcf41 (;=NaN;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result f32) ;; label = @9 block ;; label = @10 loop (result f32) ;; label = @11 block ;; label = @12 global.get 4 i32.eqz if ;; label = @13 local.get 0 return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result f32) ;; label = @12 block ;; label = @13 local.get 2 i32.const 15 i32.and local.get 7 i64.store offset=22 align=2 i64.const -2 local.set 6 end loop (result i32) ;; label = @13 block ;; label = @14 global.get 4 i32.eqz if ;; label = @15 f64.const 0x1.060606060606p+519 (;=1756580577739303000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result i32) ;; label = @14 local.get 5 i32.const 141 local.tee 5 br_if 0 (;@14;) if (result i32) ;; label = @15 local.get 5 else i32.const 2097152 end if ;; label = @15 i32.const 2048 i32.eqz if ;; label = @16 local.get 0 local.set 0 else f64.const 0x1p+41 (;=2199023255552;) local.set 10 end local.get 8 local.set 4 else i32.const 1381126738 local.set 2 local.get 1 local.set 6 end loop (result i32) ;; label = @15 block ;; label = @16 global.get 4 i32 [message truncated]
Wasmtime GitHub notifications bot (Mar 16 2020 at 22:24):fitzgen labeled Issue #1331:
This test case, produced by
wasm-opt -ttf, produces different results for function 5 when compiled with speed-and-size optimizations vs without any optimizations:<details><summary>WAT test case</summary>
(module (type (;0;) (func)) (type (;1;) (func (param i32))) (type (;2;) (func (param i64))) (type (;3;) (func (param f32))) (type (;4;) (func (param f64))) (type (;5;) (func (result i32))) (type (;6;) (func (param f64 i64 i32 i64 f32) (result f64))) (import "fuzzing-support" "log-i32" (func (;0;) (type 1))) (import "fuzzing-support" "log-i64" (func (;1;) (type 2))) (import "fuzzing-support" "log-f32" (func (;2;) (type 3))) (import "fuzzing-support" "log-f64" (func (;3;) (type 4))) (func (;4;) (type 5) (result i32) (local i32) i32.const 5381 local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=1 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=2 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=3 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=4 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=5 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=6 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=7 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=8 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=9 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=10 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=11 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=12 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=13 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=14 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=15 i32.xor local.set 0 local.get 0) (func (;5;) (type 6) (param f64 i64 i32 i64 f32) (result f64) (local i32 i64 i64 f32 f64 f64) block ;; label = @1 global.get 4 i32.eqz if ;; label = @2 f64.const 0x1.00000002p+31 (;=2147483649;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @1 loop ;; label = @2 block ;; label = @3 global.get 4 i32.eqz if ;; label = @4 f64.const 0x1.dcp+6 (;=119;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @3 block ;; label = @4 loop ;; label = @5 block ;; label = @6 global.get 4 i32.eqz if ;; label = @7 local.get 9 return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @6 block ;; label = @7 local.get 5 local.tee 2 local.tee 2 local.tee 5 local.tee 2 local.tee 5 local.tee 5 local.tee 2 local.tee 2 local.set 5 loop (result f32) ;; label = @8 block ;; label = @9 global.get 4 i32.eqz if ;; label = @10 f64.const -nan:0xfffffffffcf41 (;=NaN;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result f32) ;; label = @9 block ;; label = @10 loop (result f32) ;; label = @11 block ;; label = @12 global.get 4 i32.eqz if ;; label = @13 local.get 0 return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result f32) ;; label = @12 block ;; label = @13 local.get 2 i32.const 15 i32.and local.get 7 i64.store offset=22 align=2 i64.const -2 local.set 6 end loop (result i32) ;; label = @13 block ;; label = @14 global.get 4 i32.eqz if ;; label = @15 f64.const 0x1.060606060606p+519 (;=1756580577739303000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result i32) ;; label = @14 local.get 5 i32.const 141 local.tee 5 br_if 0 (;@14;) if (result i32) ;; label = @15 local.get 5 else i32.const 2097152 end if ;; label = @15 i32.const 2048 i32.eqz if ;; label = @16 local.get 0 local.set 0 else f64.const 0x1p+41 (;=2199023255552;) local.set 10 end local.get 8 local.set 4 else i32.const 1381126738 local.set 2 local.get 1 local.set 6 end loop (result i32) ;; label = @15 block ;; label = @16 global.get 4 i3 [message truncated]
Wasmtime GitHub notifications bot (Mar 16 2020 at 22:24):fitzgen labeled Issue #1331:
This test case, produced by
wasm-opt -ttf, produces different results for function 5 when compiled with speed-and-size optimizations vs without any optimizations:<details><summary>WAT test case</summary>
(module (type (;0;) (func)) (type (;1;) (func (param i32))) (type (;2;) (func (param i64))) (type (;3;) (func (param f32))) (type (;4;) (func (param f64))) (type (;5;) (func (result i32))) (type (;6;) (func (param f64 i64 i32 i64 f32) (result f64))) (import "fuzzing-support" "log-i32" (func (;0;) (type 1))) (import "fuzzing-support" "log-i64" (func (;1;) (type 2))) (import "fuzzing-support" "log-f32" (func (;2;) (type 3))) (import "fuzzing-support" "log-f64" (func (;3;) (type 4))) (func (;4;) (type 5) (result i32) (local i32) i32.const 5381 local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=1 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=2 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=3 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=4 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=5 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=6 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=7 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=8 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=9 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=10 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=11 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=12 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=13 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=14 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=15 i32.xor local.set 0 local.get 0) (func (;5;) (type 6) (param f64 i64 i32 i64 f32) (result f64) (local i32 i64 i64 f32 f64 f64) block ;; label = @1 global.get 4 i32.eqz if ;; label = @2 f64.const 0x1.00000002p+31 (;=2147483649;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @1 loop ;; label = @2 block ;; label = @3 global.get 4 i32.eqz if ;; label = @4 f64.const 0x1.dcp+6 (;=119;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @3 block ;; label = @4 loop ;; label = @5 block ;; label = @6 global.get 4 i32.eqz if ;; label = @7 local.get 9 return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @6 block ;; label = @7 local.get 5 local.tee 2 local.tee 2 local.tee 5 local.tee 2 local.tee 5 local.tee 5 local.tee 2 local.tee 2 local.set 5 loop (result f32) ;; label = @8 block ;; label = @9 global.get 4 i32.eqz if ;; label = @10 f64.const -nan:0xfffffffffcf41 (;=NaN;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result f32) ;; label = @9 block ;; label = @10 loop (result f32) ;; label = @11 block ;; label = @12 global.get 4 i32.eqz if ;; label = @13 local.get 0 return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result f32) ;; label = @12 block ;; label = @13 local.get 2 i32.const 15 i32.and local.get 7 i64.store offset=22 align=2 i64.const -2 local.set 6 end loop (result i32) ;; label = @13 block ;; label = @14 global.get 4 i32.eqz if ;; label = @15 f64.const 0x1.060606060606p+519 (;=1756580577739303000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result i32) ;; label = @14 local.get 5 i32.const 141 local.tee 5 br_if 0 (;@14;) if (result i32) ;; label = @15 local.get 5 else i32.const 2097152 end if ;; label = @15 i32.const 2048 i32.eqz if ;; label = @16 local.get 0 local.set 0 else f64.const 0x1p+41 (;=2199023255552;) local.set 10 end local.get 8 local.set 4 else i32.const 1381126738 local.set 2 local.get 1 local.set 6 end loop (result i32) ;; label = @15 block ;; label = @16 global.get 4 i3 [message truncated]
Wasmtime GitHub notifications bot (Mar 16 2020 at 22:24):fitzgen labeled Issue #1331:
This test case, produced by
wasm-opt -ttf, produces different results for function 5 when compiled with speed-and-size optimizations vs without any optimizations:<details><summary>WAT test case</summary>
(module (type (;0;) (func)) (type (;1;) (func (param i32))) (type (;2;) (func (param i64))) (type (;3;) (func (param f32))) (type (;4;) (func (param f64))) (type (;5;) (func (result i32))) (type (;6;) (func (param f64 i64 i32 i64 f32) (result f64))) (import "fuzzing-support" "log-i32" (func (;0;) (type 1))) (import "fuzzing-support" "log-i64" (func (;1;) (type 2))) (import "fuzzing-support" "log-f32" (func (;2;) (type 3))) (import "fuzzing-support" "log-f64" (func (;3;) (type 4))) (func (;4;) (type 5) (result i32) (local i32) i32.const 5381 local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=1 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=2 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=3 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=4 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=5 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=6 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=7 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=8 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=9 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=10 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=11 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=12 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=13 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=14 i32.xor local.set 0 local.get 0 i32.const 5 i32.shl local.get 0 i32.add i32.const 0 i32.load8_u offset=15 i32.xor local.set 0 local.get 0) (func (;5;) (type 6) (param f64 i64 i32 i64 f32) (result f64) (local i32 i64 i64 f32 f64 f64) block ;; label = @1 global.get 4 i32.eqz if ;; label = @2 f64.const 0x1.00000002p+31 (;=2147483649;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @1 loop ;; label = @2 block ;; label = @3 global.get 4 i32.eqz if ;; label = @4 f64.const 0x1.dcp+6 (;=119;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @3 block ;; label = @4 loop ;; label = @5 block ;; label = @6 global.get 4 i32.eqz if ;; label = @7 local.get 9 return end global.get 4 i32.const 1 i32.sub global.set 4 end block ;; label = @6 block ;; label = @7 local.get 5 local.tee 2 local.tee 2 local.tee 5 local.tee 2 local.tee 5 local.tee 5 local.tee 2 local.tee 2 local.set 5 loop (result f32) ;; label = @8 block ;; label = @9 global.get 4 i32.eqz if ;; label = @10 f64.const -nan:0xfffffffffcf41 (;=NaN;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result f32) ;; label = @9 block ;; label = @10 loop (result f32) ;; label = @11 block ;; label = @12 global.get 4 i32.eqz if ;; label = @13 local.get 0 return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result f32) ;; label = @12 block ;; label = @13 local.get 2 i32.const 15 i32.and local.get 7 i64.store offset=22 align=2 i64.const -2 local.set 6 end loop (result i32) ;; label = @13 block ;; label = @14 global.get 4 i32.eqz if ;; label = @15 f64.const 0x1.060606060606p+519 (;=1756580577739303000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;) return end global.get 4 i32.const 1 i32.sub global.set 4 end block (result i32) ;; label = @14 local.get 5 i32.const 141 local.tee 5 br_if 0 (;@14;) if (result i32) ;; label = @15 local.get 5 else i32.const 2097152 end if ;; label = @15 i32.const 2048 i32.eqz if ;; label = @16 local.get 0 local.set 0 else f64.const 0x1p+41 (;=2199023255552;) local.set 10 end local.get 8 local.set 4 else i32.const 1381126738 local.set 2 local.get 1 local.set 6 end loop (result i32) ;; label = @15 block ;; label = @16 global.get 4 i3 [message truncated]
Wasmtime GitHub notifications bot (Mar 16 2020 at 23:17):fitzgen commented on Issue #1331:
Interesting, when run via
wasmtime --invoke func_5 test-case.wasm, we see a verifier error:<details><summary>verifier error</summary>
Error: failed to run main module `testcase0.wasm` Caused by: 0: WebAssembly failed to compile 1: Compilation error: function u0:5(i64 vmctx [%rdi], i64 [%rsi], f64 [%xmm0], i64 [%rdx], i32 [%rcx], i64 [%r8], f32 [%xmm1]) -> f64 [%xmm0] system_v { ss0 = spill_slot 8 ss1 = spill_slot 8 ss2 = spill_slot 8 ss3 = spill_slot 4 ss4 = spill_slot 8 ss5 = spill_slot 8 ss6 = spill_slot 4 ss7 = spill_slot 4 ss8 = spill_slot 4 ss9 = spill_slot 4 ss10 = spill_slot 4 ss11 = spill_slot 4 ss12 = spill_slot 4 ss13 = spill_slot 4 ss14 = spill_slot 4 ss15 = spill_slot 4 ss16 = spill_slot 4 ss17 = spill_slot 4 ss18 = spill_slot 8 ss19 = spill_slot 8 ss20 = spill_slot 4 ss21 = spill_slot 4 ss22 = spill_slot 4 ss23 = spill_slot 4 ss24 = spill_slot 4 ss25 = spill_slot 4 ss26 = spill_slot 8 ss27 = spill_slot 4 ss28 = spill_slot 4 ss29 = spill_slot 8 ss30 = spill_slot 4 ss31 = spill_slot 4 ss32 = spill_slot 4 ss33 = spill_slot 4 ss34 = spill_slot 4 ss35 = emergency_slot 4 gv0 = vmctx gv1 = load.i64 notrap aligned readonly gv0+108 heap0 = static gv1, min 0, bound 0x0001_0000_0000, offset_guard 0x8000_0000, index_type i32 block0(v1075: i64 [%rdi], v1: i64 [%rsi], v2: f64 [%xmm0], v1076: i64 [%rdx], v4: i32 [%rcx], v1077: i64 [%r8], v6: f32 [%xmm1]): [RexOp1spillSib32#8089,ss0] v0 = spill v1075 v12 -> v0 v17 -> v0 v21 -> v0 v22 -> v0 v27 -> v0 v31 -> v0 v32 -> v0 v37 -> v0 v41 -> v0 v44 -> v0 v49 -> v0 v53 -> v0 v56 -> v0 v61 -> v0 v65 -> v0 v74 -> v0 v79 -> v0 v83 -> v0 v102 -> v0 v107 -> v0 v111 -> v0 v150 -> v0 v155 -> v0 v159 -> v0 v168 -> v0 v176 -> v0 v210 -> v0 v215 -> v0 v219 -> v0 v243 -> v0 v248 -> v0 v252 -> v0 v289 -> v0 v294 -> v0 v298 -> v0 v325 -> v0 v330 -> v0 v334 -> v0 v364 -> v0 v369 -> v0 v373 -> v0 v396 -> v0 v401 -> v0 v405 -> v0 v420 -> v0 v425 -> v0 v429 -> v0 v504 -> v0 v509 -> v0 v513 -> v0 v515 -> v0 v520 -> v0 v524 -> v0 v540 -> v0 v545 -> v0 v549 -> v0 v588 -> v0 v593 -> v0 v597 -> v0 v605 -> v0 v610 -> v0 v614 -> v0 v627 -> v0 v632 -> v0 v636 -> v0 v638 -> v0 v643 -> v0 v647 -> v0 v655 -> v0 v660 -> v0 v664 -> v0 [RexOp1spillSib32#8089,ss1] v3 = spill v1076 [RexOp1spillSib32#8089,ss2] v5 = spill v1077 @022d [RexOp1pu_id#b8,%rax] v1078 = iconst.i32 0 @022d [RexOp1spillSib32#89,ss3] v8 = spill v1078 @022f [RexOp1pu_id#b8,%rax] v1079 = iconst.i64 0 @022f [RexOp1spillSib32#8089,ss4] v9 = spill v1079 @0231 [RexOp2f32imm_z#457,%xmm2] v10 = f32const 0.0 @0233 [RexMp2f64imm_z#557,%xmm3] v11 = f64const 0.0 @0237 [RexOp1fillSib32#808b,%r15] v1080 = fill v0 @0237 [RexOp1ldDisp32#8b,%rax] v13 = load.i32 notrap aligned v1080+192 @023a [RexOp1tjccb#75] brnz v13, block3 @023a [Op1jmpb#eb] jump block4 block4: @023c [RexOp1pu_iq#80b8,%rax] v852 = iconst.i64 0x41e0_0000_0020_0000 @023c [RexMp2frurm#856e,%xmm0] v16 = bitcast.f64 v852 @0245 [Op1ret#c3] return v16 block3: @0247 [RexOp1fillSib32#808b,%r15] v1081 = fill.i64 v0 @0247 [RexOp1ldDisp32#8b,%rax] v18 = load.i32 notrap aligned v1081+192 @024b [DynRexOp1r_ib#83,%rax] v20 = iadd_imm v18, -1 @024c [RexOp1fillSib32#808b,%r15] v1082 = fill.i64 v0 @024c [RexOp1stDisp32#89] store notrap aligned v20, v1082+192 @024e [Op1jmpb#eb] jump block2 block2: @02de [RexOp1fillSib32#808b,%r15] v1083 = fill.i64 v0 @02de [RexOp1ldDisp8#808b,%rax] v1084 = load.i64 notrap aligned readonly v1083+108 @02de [RexOp1spillSib32#8089,ss5] v856 = spill v1084 v864 -> v856 v874 -> v856 v882 -> v856 @0306 [RexOp1pu_id#b8,%rax] v1085 = iconst.i32 141 @0306 [RexOp1spillSib32#89,ss6] v86 = spill v1085 v140 -> v86 v141 -> v86 @0312 [RexOp1pu_id#b8,%rax] v1086 = iconst.i32 0x0020_0000 @0312 [RexOp1spillSib32#89,ss7] v88 = spill v1086 @031a [RexOp1pu_id#b8,%rax] v1087 = iconst.i32 2048 @031a [RexOp1spillSib32#89,ss8] v89 = spill v1087 @0325 [RexOp1pu_iq#80b8,%rax] v858 = iconst.i64 0x4280_0000_0000_0000 @0325 [RexMp2frurm#856e,%xmm4] v94 = bitcast.f64 v858 @0336 [RexOp1pu_id#b8,%rax] v1088 = iconst.i32 0x5252_5252 @0336 [RexOp1spillSib32#89,ss9] v98 = spill v1088 @038c [RexOp1pu_id#b8,%rax] v1089 = iconst.i32 255 @038c [RexOp1spillSib32#89,ss10] v167 = spill v1089 @03a7 [RexOp1pu_id#b8,%rax] v1090 = iconst.i32 -126 @03a7 [RexOp1spillSib32#89,ss11] v177 = spill v1090 v227 -> v177 v532 -> v177 v622 -> v177 @03c1 [RexOp1pu_id#b8,%rax] v1091 = iconst.i32 -70 @03c1 [RexOp1spillSib32#89,ss12] v185 = spill v1091 @03df [RexOp1pu_id#b8,%rax] v199 = iconst.i32 0x6464_6464 @03e5 [RexMp2urm#6bd,%rax] v1092 = clz v199 @03e5 [RexOp1spillSib32#89,ss13] v200 = spill v1092 @0417 [RexOp1pu_iq#80b8,%rax] v861 = iconst.i64 0x41c7_9797_9780_0000 v871 -> v861 v879 -> v861 @0417 [RexMp2frurm#856e,%xmm5] v221 = bitcast.f64 v861 v287 -> v221 v526 -> v221 [message truncated]
Wasmtime GitHub notifications bot (Mar 16 2020 at 23:20):fitzgen commented on Issue #1331:
Ah its just for
DifferentialConfig::to_wasmtime_configthat we don't enable the verifier!
Wasmtime GitHub notifications bot (Mar 16 2020 at 23:29):fitzgen edited a comment on Issue #1331:
Interesting, when run via
wasmtime --invoke func_5 test-case.wasm, we see a verifier error:<details><summary>verifier error</summary>
Error: failed to run main module `testcase0.wasm` Caused by: 0: WebAssembly failed to compile 1: Compilation error: function u0:5(i64 vmctx [%rdi], i64 [%rsi], f64 [%xmm0], i64 [%rdx], i32 [%rcx], i64 [%r8], f32 [%xmm1]) -> f64 [%xmm0] system_v { ss0 = spill_slot 8 ss1 = spill_slot 8 ss2 = spill_slot 8 ss3 = spill_slot 4 ss4 = spill_slot 8 ss5 = spill_slot 8 ss6 = spill_slot 4 ss7 = spill_slot 4 ss8 = spill_slot 4 ss9 = spill_slot 4 ss10 = spill_slot 4 ss11 = spill_slot 4 ss12 = spill_slot 4 ss13 = spill_slot 4 ss14 = spill_slot 4 ss15 = spill_slot 4 ss16 = spill_slot 4 ss17 = spill_slot 4 ss18 = spill_slot 8 ss19 = spill_slot 8 ss20 = spill_slot 4 ss21 = spill_slot 4 ss22 = spill_slot 4 ss23 = spill_slot 4 ss24 = spill_slot 4 ss25 = spill_slot 4 ss26 = spill_slot 8 ss27 = spill_slot 4 ss28 = spill_slot 4 ss29 = spill_slot 8 ss30 = spill_slot 4 ss31 = spill_slot 4 ss32 = spill_slot 4 ss33 = spill_slot 4 ss34 = spill_slot 4 ss35 = emergency_slot 4 gv0 = vmctx gv1 = load.i64 notrap aligned readonly gv0+108 heap0 = static gv1, min 0, bound 0x0001_0000_0000, offset_guard 0x8000_0000, index_type i32 block0(v1075: i64 [%rdi], v1: i64 [%rsi], v2: f64 [%xmm0], v1076: i64 [%rdx], v4: i32 [%rcx], v1077: i64 [%r8], v6: f32 [%xmm1]): [RexOp1spillSib32#8089,ss0] v0 = spill v1075 v12 -> v0 v17 -> v0 v21 -> v0 v22 -> v0 v27 -> v0 v31 -> v0 v32 -> v0 v37 -> v0 v41 -> v0 v44 -> v0 v49 -> v0 v53 -> v0 v56 -> v0 v61 -> v0 v65 -> v0 v74 -> v0 v79 -> v0 v83 -> v0 v102 -> v0 v107 -> v0 v111 -> v0 v150 -> v0 v155 -> v0 v159 -> v0 v168 -> v0 v176 -> v0 v210 -> v0 v215 -> v0 v219 -> v0 v243 -> v0 v248 -> v0 v252 -> v0 v289 -> v0 v294 -> v0 v298 -> v0 v325 -> v0 v330 -> v0 v334 -> v0 v364 -> v0 v369 -> v0 v373 -> v0 v396 -> v0 v401 -> v0 v405 -> v0 v420 -> v0 v425 -> v0 v429 -> v0 v504 -> v0 v509 -> v0 v513 -> v0 v515 -> v0 v520 -> v0 v524 -> v0 v540 -> v0 v545 -> v0 v549 -> v0 v588 -> v0 v593 -> v0 v597 -> v0 v605 -> v0 v610 -> v0 v614 -> v0 v627 -> v0 v632 -> v0 v636 -> v0 v638 -> v0 v643 -> v0 v647 -> v0 v655 -> v0 v660 -> v0 v664 -> v0 [RexOp1spillSib32#8089,ss1] v3 = spill v1076 [RexOp1spillSib32#8089,ss2] v5 = spill v1077 @022d [RexOp1pu_id#b8,%rax] v1078 = iconst.i32 0 @022d [RexOp1spillSib32#89,ss3] v8 = spill v1078 @022f [RexOp1pu_id#b8,%rax] v1079 = iconst.i64 0 @022f [RexOp1spillSib32#8089,ss4] v9 = spill v1079 @0231 [RexOp2f32imm_z#457,%xmm2] v10 = f32const 0.0 @0233 [RexMp2f64imm_z#557,%xmm3] v11 = f64const 0.0 @0237 [RexOp1fillSib32#808b,%r15] v1080 = fill v0 @0237 [RexOp1ldDisp32#8b,%rax] v13 = load.i32 notrap aligned v1080+192 @023a [RexOp1tjccb#75] brnz v13, block3 @023a [Op1jmpb#eb] jump block4 block4: @023c [RexOp1pu_iq#80b8,%rax] v852 = iconst.i64 0x41e0_0000_0020_0000 @023c [RexMp2frurm#856e,%xmm0] v16 = bitcast.f64 v852 @0245 [Op1ret#c3] return v16 block3: @0247 [RexOp1fillSib32#808b,%r15] v1081 = fill.i64 v0 @0247 [RexOp1ldDisp32#8b,%rax] v18 = load.i32 notrap aligned v1081+192 @024b [DynRexOp1r_ib#83,%rax] v20 = iadd_imm v18, -1 @024c [RexOp1fillSib32#808b,%r15] v1082 = fill.i64 v0 @024c [RexOp1stDisp32#89] store notrap aligned v20, v1082+192 @024e [Op1jmpb#eb] jump block2 block2: @02de [RexOp1fillSib32#808b,%r15] v1083 = fill.i64 v0 @02de [RexOp1ldDisp8#808b,%rax] v1084 = load.i64 notrap aligned readonly v1083+108 @02de [RexOp1spillSib32#8089,ss5] v856 = spill v1084 v864 -> v856 v874 -> v856 v882 -> v856 @0306 [RexOp1pu_id#b8,%rax] v1085 = iconst.i32 141 @0306 [RexOp1spillSib32#89,ss6] v86 = spill v1085 v140 -> v86 v141 -> v86 @0312 [RexOp1pu_id#b8,%rax] v1086 = iconst.i32 0x0020_0000 @0312 [RexOp1spillSib32#89,ss7] v88 = spill v1086 @031a [RexOp1pu_id#b8,%rax] v1087 = iconst.i32 2048 @031a [RexOp1spillSib32#89,ss8] v89 = spill v1087 @0325 [RexOp1pu_iq#80b8,%rax] v858 = iconst.i64 0x4280_0000_0000_0000 @0325 [RexMp2frurm#856e,%xmm4] v94 = bitcast.f64 v858 @0336 [RexOp1pu_id#b8,%rax] v1088 = iconst.i32 0x5252_5252 @0336 [RexOp1spillSib32#89,ss9] v98 = spill v1088 @038c [RexOp1pu_id#b8,%rax] v1089 = iconst.i32 255 @038c [RexOp1spillSib32#89,ss10] v167 = spill v1089 @03a7 [RexOp1pu_id#b8,%rax] v1090 = iconst.i32 -126 @03a7 [RexOp1spillSib32#89,ss11] v177 = spill v1090 v227 -> v177 v532 -> v177 v622 -> v177 @03c1 [RexOp1pu_id#b8,%rax] v1091 = iconst.i32 -70 @03c1 [RexOp1spillSib32#89,ss12] v185 = spill v1091 @03df [RexOp1pu_id#b8,%rax] v199 = iconst.i32 0x6464_6464 @03e5 [RexMp2urm#6bd,%rax] v1092 = clz v199 @03e5 [RexOp1spillSib32#89,ss13] v200 = spill v1092 @0417 [RexOp1pu_iq#80b8,%rax] v861 = iconst.i64 0x41c7_9797_9780_0000 v871 -> v861 v879 -> v861 @0417 [RexMp2frurm#856e,%xmm5] v221 = bitcast.f64 v861 v287 -> v221 v526 -> v221 [message truncated]
Last updated: Dec 23 2024 at 13:07 UTC