Stream: git-wasmtime

Topic: wasmtime / Issue #1303 Trampoline error for function with...

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 19:38):

alexcrichton opened Issue #1303:

Given this input:

(module
  (func (export "foo")
    (param f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32)
  )
)

the current wasmtime CLI will fail with:

$ cargo run -- --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3                                                                                                                                                                           Finished dev [unoptimized + debuginfo] target(s) in 0.08s
     Running `target/debug/wasmtime --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3`
warning: using `--invoke` with a function that takes arguments is experimental and may break in the future
Error: failed to run main module `call.wat`

Caused by:
    0: failed to invoke `foo`
    1: trampoline error: Compile(Codegen("function u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {\n    ss0 = outgoing_arg 4, offset 0\n    ss1 = outgoing_arg 4, offset 8\n    ss2 = outgoing_arg 4, offset 16\n    ss3 = outgoing_arg 4, offset 24\n    ss4 = outgoing_arg 4, offset 32\n    ss5 = outgoing_arg 4, offset 40\n    ss6 = outgoing_arg 4, offset 48\n    ss7 = outgoing_arg 4, offset 56\n    ss8 = outgoing_arg 4, offset 64\n    sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v\n\n
         block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):\n[RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3\n[RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16\n[RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32\n[RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48\n[RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64\n[RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80\n[RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96\n[RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112\n[RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128\n[RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144\n[RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160\n[RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176\n[RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192\n[RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208\n[RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224\n[RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240\n[RexOp1rmov#8089]                   regmove v3, %rcx -> %rax\n[RexOp2frmov#428]                   regmove v19, %xmm15 -> %xmm16\n[RexMp2fldDisp32#610,%xmm15]        v20 = load.f32 notrap aligned v3+256\n[RexMp2fspillSib32#611,ss0]         v21 = spill v12\n[RexMp2fspillSib32#611,ss1]         v22 = spill v13\n[RexMp2fspillSib32#611,ss2]         v23 = spill v14\n[RexMp2fspillSib32#611,ss3]         v24 = spill v15\n[RexMp2fspillSib32#611,ss4]         v25 = spill v16\n[RexMp2fspillSib32#611,ss5]         v26 = spill v17\n[RexMp2fspillSib32#611,ss6]         v27 = spill v18\n[RexOp2frmov#428]                   regmove v19, %xmm16 -> %xmm8\n;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n; error: inst30: RexOp2frmov#428 constraints not satisfied in: regmove.f32 v19, %xmm16 -> %xmm8\nfunction u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {\n    ss0 = outgoing_arg 4, offset 0\n    ss1 = outgoing_arg 4, offset 8\n    ss2 = outgoing_arg 4, offset 16\n    ss3 = outgoing_arg 4, offset 24\n    ss4 = outgoing_arg 4, offset 32\n    ss5 = outgoing_arg 4, offset 40\n    ss6 = outgoing_arg 4, offset 48\n    ss7 = outgoing_arg 4, offset 56\n    ss8 = outgoing_arg 4, offset 64\n    sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v\n\n                                block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):\n[RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3\n[RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16\n[RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32\n[RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48\n[RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64\n[RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80\n[RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96\n[RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112\n[RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128\n[RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144\n[RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160\n[RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176\n[RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192\n[RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208\n[RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224\n[RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240\n[RexOp1rmov#8089]                   regmove v3, %rcx -> %rax\n[RexOp2frmov#428]                   regmove v19, %xmm15 -> %xmm16\n[RexMp2fldDisp32#610,%xmm15]        v20 = load.f32 notrap aligned v3+256\n[RexMp2fspillSib32#611,ss0]         v21 = spill v12\n[RexMp2fspillSib32#611,ss1]         v22 = spill v13\n[RexMp2fspillSib32#611,ss2]         v23 = spill v14\n[RexMp2fspillSib32#611,ss3]         v24 = spill v15\n[RexMp2fspillSib32#611,ss4]         v25 = spill v16\n[RexMp2fspillSib32#611,ss5]         v26 = spill v17\n[RexMp2fspillSib32#611,ss6]         v27 = spill v18\n[RexOp2frmov#428]                   regmove v19, %xmm16 -> %xmm8\n[RexMp2fspillSib32#611,ss7]         v28 = spill v19\n[RexMp2fspillSib32#611,ss8]         v29 = spill v20\n[RexOp1call_r#20ff]                 call_indirect sig0, v2(v0, v1, v4, v5, v6, v7, v8, v9, v10, v11, v21, v22, v23, v24, v25, v26, v27, v28, v29)\n[Op1ret#c3]                         return\n}\n\n\n[RexMp2fspillSib32#611,ss7]         v28 = spill v19\n[RexMp2fspillSib32#611,ss8]         v29 = spill v20\n[RexOp1call_r#20ff]                 call_indirect sig0, v2(v0, v1, v4, v5, v6, v7, v8, v9, v10, v11, v21, v22, v23, v24, v25, v26, v27, v28, v29)\n[Op1ret#c3]                         return\n}\n\n; 1 verifier error detected (see above). Compilation aborted.\n"))

Cleaned up a bit this yields:

<details>

    Finished dev [unoptimized + debuginfo] target(s) in 0.08s
     Running `target/debug/wasmtime --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3`
warning: using `--invoke` with a function that takes arguments is experimental and may break in the future
Error: failed to run main module `call.wat`

Caused by:
    0: failed to invoke `foo`
    1: trampoline error: WebAssembly failed to compile

       Caused by:
           Compilation error: function u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {
               ss0 = outgoing_arg 4, offset 0
               ss1 = outgoing_arg 4, offset 8
               ss2 = outgoing_arg 4, offset 16
               ss3 = outgoing_arg 4, offset 24
               ss4 = outgoing_arg 4, offset 32
               ss5 = outgoing_arg 4, offset 40
               ss6 = outgoing_arg 4, offset 48
               ss7 = outgoing_arg 4, offset 56
               ss8 = outgoing_arg 4, offset 64
               sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v

                                           block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):
           [RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3
           [RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16
           [RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32
           [RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48
           [RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64
           [RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80
           [RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96
           [RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112
           [RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128
           [RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144
           [RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160
           [RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176
           [RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192
           [RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208
           [RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224
           [RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240
           [RexOp1rmov#8089]                   regmove v3, %rcx -> %rax
           [RexOp2frmov#428]                   re
[message truncated]

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 19:38):

alexcrichton labeled Issue #1303:

Given this input:

(module
  (func (export "foo")
    (param f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32)
  )
)

the current wasmtime CLI will fail with:

$ cargo run -- --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3                                                                                                                                                                           Finished dev [unoptimized + debuginfo] target(s) in 0.08s
     Running `target/debug/wasmtime --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3`
warning: using `--invoke` with a function that takes arguments is experimental and may break in the future
Error: failed to run main module `call.wat`

Caused by:
    0: failed to invoke `foo`
    1: trampoline error: Compile(Codegen("function u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {\n    ss0 = outgoing_arg 4, offset 0\n    ss1 = outgoing_arg 4, offset 8\n    ss2 = outgoing_arg 4, offset 16\n    ss3 = outgoing_arg 4, offset 24\n    ss4 = outgoing_arg 4, offset 32\n    ss5 = outgoing_arg 4, offset 40\n    ss6 = outgoing_arg 4, offset 48\n    ss7 = outgoing_arg 4, offset 56\n    ss8 = outgoing_arg 4, offset 64\n    sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v\n\n
         block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):\n[RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3\n[RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16\n[RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32\n[RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48\n[RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64\n[RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80\n[RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96\n[RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112\n[RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128\n[RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144\n[RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160\n[RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176\n[RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192\n[RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208\n[RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224\n[RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240\n[RexOp1rmov#8089]                   regmove v3, %rcx -> %rax\n[RexOp2frmov#428]                   regmove v19, %xmm15 -> %xmm16\n[RexMp2fldDisp32#610,%xmm15]        v20 = load.f32 notrap aligned v3+256\n[RexMp2fspillSib32#611,ss0]         v21 = spill v12\n[RexMp2fspillSib32#611,ss1]         v22 = spill v13\n[RexMp2fspillSib32#611,ss2]         v23 = spill v14\n[RexMp2fspillSib32#611,ss3]         v24 = spill v15\n[RexMp2fspillSib32#611,ss4]         v25 = spill v16\n[RexMp2fspillSib32#611,ss5]         v26 = spill v17\n[RexMp2fspillSib32#611,ss6]         v27 = spill v18\n[RexOp2frmov#428]                   regmove v19, %xmm16 -> %xmm8\n;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n; error: inst30: RexOp2frmov#428 constraints not satisfied in: regmove.f32 v19, %xmm16 -> %xmm8\nfunction u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {\n    ss0 = outgoing_arg 4, offset 0\n    ss1 = outgoing_arg 4, offset 8\n    ss2 = outgoing_arg 4, offset 16\n    ss3 = outgoing_arg 4, offset 24\n    ss4 = outgoing_arg 4, offset 32\n    ss5 = outgoing_arg 4, offset 40\n    ss6 = outgoing_arg 4, offset 48\n    ss7 = outgoing_arg 4, offset 56\n    ss8 = outgoing_arg 4, offset 64\n    sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v\n\n                                block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):\n[RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3\n[RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16\n[RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32\n[RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48\n[RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64\n[RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80\n[RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96\n[RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112\n[RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128\n[RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144\n[RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160\n[RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176\n[RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192\n[RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208\n[RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224\n[RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240\n[RexOp1rmov#8089]                   regmove v3, %rcx -> %rax\n[RexOp2frmov#428]                   regmove v19, %xmm15 -> %xmm16\n[RexMp2fldDisp32#610,%xmm15]        v20 = load.f32 notrap aligned v3+256\n[RexMp2fspillSib32#611,ss0]         v21 = spill v12\n[RexMp2fspillSib32#611,ss1]         v22 = spill v13\n[RexMp2fspillSib32#611,ss2]         v23 = spill v14\n[RexMp2fspillSib32#611,ss3]         v24 = spill v15\n[RexMp2fspillSib32#611,ss4]         v25 = spill v16\n[RexMp2fspillSib32#611,ss5]         v26 = spill v17\n[RexMp2fspillSib32#611,ss6]         v27 = spill v18\n[RexOp2frmov#428]                   regmove v19, %xmm16 -> %xmm8\n[RexMp2fspillSib32#611,ss7]         v28 = spill v19\n[RexMp2fspillSib32#611,ss8]         v29 = spill v20\n[RexOp1call_r#20ff]                 call_indirect sig0, v2(v0, v1, v4, v5, v6, v7, v8, v9, v10, v11, v21, v22, v23, v24, v25, v26, v27, v28, v29)\n[Op1ret#c3]                         return\n}\n\n\n[RexMp2fspillSib32#611,ss7]         v28 = spill v19\n[RexMp2fspillSib32#611,ss8]         v29 = spill v20\n[RexOp1call_r#20ff]                 call_indirect sig0, v2(v0, v1, v4, v5, v6, v7, v8, v9, v10, v11, v21, v22, v23, v24, v25, v26, v27, v28, v29)\n[Op1ret#c3]                         return\n}\n\n; 1 verifier error detected (see above). Compilation aborted.\n"))

Cleaned up a bit this yields:

<details>

    Finished dev [unoptimized + debuginfo] target(s) in 0.08s
     Running `target/debug/wasmtime --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3`
warning: using `--invoke` with a function that takes arguments is experimental and may break in the future
Error: failed to run main module `call.wat`

Caused by:
    0: failed to invoke `foo`
    1: trampoline error: WebAssembly failed to compile

       Caused by:
           Compilation error: function u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {
               ss0 = outgoing_arg 4, offset 0
               ss1 = outgoing_arg 4, offset 8
               ss2 = outgoing_arg 4, offset 16
               ss3 = outgoing_arg 4, offset 24
               ss4 = outgoing_arg 4, offset 32
               ss5 = outgoing_arg 4, offset 40
               ss6 = outgoing_arg 4, offset 48
               ss7 = outgoing_arg 4, offset 56
               ss8 = outgoing_arg 4, offset 64
               sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v

                                           block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):
           [RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3
           [RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16
           [RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32
           [RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48
           [RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64
           [RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80
           [RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96
           [RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112
           [RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128
           [RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144
           [RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160
           [RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176
           [RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192
           [RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208
           [RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224
           [RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240
           [RexOp1rmov#8089]                   regmove v3, %rcx -> %rax
           [RexOp2frmov#428]                   r
[message truncated]

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 20:59):

iximeow commented on Issue #1303:

cc @abrown - it seems odd that there would be an xmm16 but that regmove would have invalid constraints here. Do you know if the EVEX support changes might have let cranelift use xmm16-31 without using the wider FPR class?

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 21:04):

abrown commented on Issue #1303:

Yeah, something weird is going on there; I opened #1306 which may be related. I started wondering if there was some hard-coded assumptions about registers and register classes in the register allocator that are being surfaced by the addition of FP32 (sort of like the ones we fixed in the debug crate, e.g.).

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 21:06):

abrown commented on Issue #1303:

it seems odd that there would be an xmm16 but that regmove would have invalid constraints here

I actually would have expected regmove to fail even sooner--at xmm8--because enc_32_64 does not yet give it a REX prefix so it should only have FPR8 available to it.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 21:07):

abrown deleted a comment on Issue #1303:

it seems odd that there would be an xmm16 but that regmove would have invalid constraints here

I actually would have expected regmove to fail even sooner--at xmm8--because enc_32_64 does not yet give it a REX prefix so it should only have FPR8 available to it.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 21:08):

abrown commented on Issue #1303:

[deleted last comment after looking at the CLIF a bit more]

it seems odd that there would be an xmm16 but that regmove would have invalid constraints here

regmove should only have FPR8 available to it because enc_32_64 does not yet give it a REX prefix (see https://github.com/bytecodealliance/wasmtime/blob/1e7cf0a05b4e3e873035ce40e79b81d388f07ba4/cranelift/codegen/meta/src/isa/x86/encodings.rs#L1914)

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 21:10):

abrown edited a comment on Issue #1303:

[deleted last comment after looking at the CLIF a bit more]

it seems odd that there would be an xmm16 but that regmove would have invalid constraints here

regmove should only have FPR8 available to it because enc_32_64 does not yet give it a REX prefix; see https://github.com/bytecodealliance/wasmtime/blob/1e7cf0a05b4e3e873035ce40e79b81d388f07ba4/cranelift/codegen/meta/src/isa/x86/encodings.rs#L1914

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 21:11):

iximeow commented on Issue #1303:

That is weird. I just noticed that it seems to have been okay with an earlier regmove on wider classes too: [RexOp2frmov#428] regmove v19, %xmm15 -> %xmm16. I'm working on some other pieces today, so I'll just keep an eye out for your progress on #1306.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 12 2020 at 21:12):

abrown commented on Issue #1303:

So, yeah, it would seem as though the register allocator thinks there are plenty of registers to go around. In #1306 there is debug logging that looks like:

 in:  [ GPR: ---b--sd89012345 FPR32: 0----------------789012345678901 FPR: 0--------------- FLAG: f ]

I don't really understand why it would keep track of both FPR32 and FPR...

view this post on Zulip Wasmtime GitHub notifications bot (Mar 13 2020 at 17:53):

abrown commented on Issue #1303:

@alexcrichton just verified that removing the FPR32 register class (added in https://github.com/bytecodealliance/wasmtime/commit/079fcafcb1b2d4bbfddd26b201d9df38012dbd25) makes this issue go away. Doesn't really solve the issues I'm seeing in #1306, though, so I will keep investigating.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 13 2020 at 17:55):

alexcrichton commented on Issue #1303:

Nice! FWIW you can comment out this block and see if the spec tests still pass, and if they do the issue should be good to go

view this post on Zulip Wasmtime GitHub notifications bot (Mar 17 2020 at 19:46):

abrown closed Issue #1303:

Given this input:

(module
  (func (export "foo")
    (param f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32 f32)
  )
)

the current wasmtime CLI will fail with:

$ cargo run -- --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3                                                                                                                                                                           Finished dev [unoptimized + debuginfo] target(s) in 0.08s
     Running `target/debug/wasmtime --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3`
warning: using `--invoke` with a function that takes arguments is experimental and may break in the future
Error: failed to run main module `call.wat`

Caused by:
    0: failed to invoke `foo`
    1: trampoline error: Compile(Codegen("function u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {\n    ss0 = outgoing_arg 4, offset 0\n    ss1 = outgoing_arg 4, offset 8\n    ss2 = outgoing_arg 4, offset 16\n    ss3 = outgoing_arg 4, offset 24\n    ss4 = outgoing_arg 4, offset 32\n    ss5 = outgoing_arg 4, offset 40\n    ss6 = outgoing_arg 4, offset 48\n    ss7 = outgoing_arg 4, offset 56\n    ss8 = outgoing_arg 4, offset 64\n    sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v\n\n
         block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):\n[RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3\n[RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16\n[RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32\n[RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48\n[RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64\n[RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80\n[RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96\n[RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112\n[RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128\n[RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144\n[RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160\n[RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176\n[RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192\n[RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208\n[RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224\n[RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240\n[RexOp1rmov#8089]                   regmove v3, %rcx -> %rax\n[RexOp2frmov#428]                   regmove v19, %xmm15 -> %xmm16\n[RexMp2fldDisp32#610,%xmm15]        v20 = load.f32 notrap aligned v3+256\n[RexMp2fspillSib32#611,ss0]         v21 = spill v12\n[RexMp2fspillSib32#611,ss1]         v22 = spill v13\n[RexMp2fspillSib32#611,ss2]         v23 = spill v14\n[RexMp2fspillSib32#611,ss3]         v24 = spill v15\n[RexMp2fspillSib32#611,ss4]         v25 = spill v16\n[RexMp2fspillSib32#611,ss5]         v26 = spill v17\n[RexMp2fspillSib32#611,ss6]         v27 = spill v18\n[RexOp2frmov#428]                   regmove v19, %xmm16 -> %xmm8\n;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n; error: inst30: RexOp2frmov#428 constraints not satisfied in: regmove.f32 v19, %xmm16 -> %xmm8\nfunction u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {\n    ss0 = outgoing_arg 4, offset 0\n    ss1 = outgoing_arg 4, offset 8\n    ss2 = outgoing_arg 4, offset 16\n    ss3 = outgoing_arg 4, offset 24\n    ss4 = outgoing_arg 4, offset 32\n    ss5 = outgoing_arg 4, offset 40\n    ss6 = outgoing_arg 4, offset 48\n    ss7 = outgoing_arg 4, offset 56\n    ss8 = outgoing_arg 4, offset 64\n    sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v\n\n                                block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):\n[RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3\n[RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16\n[RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32\n[RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48\n[RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64\n[RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80\n[RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96\n[RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112\n[RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128\n[RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144\n[RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160\n[RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176\n[RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192\n[RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208\n[RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224\n[RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240\n[RexOp1rmov#8089]                   regmove v3, %rcx -> %rax\n[RexOp2frmov#428]                   regmove v19, %xmm15 -> %xmm16\n[RexMp2fldDisp32#610,%xmm15]        v20 = load.f32 notrap aligned v3+256\n[RexMp2fspillSib32#611,ss0]         v21 = spill v12\n[RexMp2fspillSib32#611,ss1]         v22 = spill v13\n[RexMp2fspillSib32#611,ss2]         v23 = spill v14\n[RexMp2fspillSib32#611,ss3]         v24 = spill v15\n[RexMp2fspillSib32#611,ss4]         v25 = spill v16\n[RexMp2fspillSib32#611,ss5]         v26 = spill v17\n[RexMp2fspillSib32#611,ss6]         v27 = spill v18\n[RexOp2frmov#428]                   regmove v19, %xmm16 -> %xmm8\n[RexMp2fspillSib32#611,ss7]         v28 = spill v19\n[RexMp2fspillSib32#611,ss8]         v29 = spill v20\n[RexOp1call_r#20ff]                 call_indirect sig0, v2(v0, v1, v4, v5, v6, v7, v8, v9, v10, v11, v21, v22, v23, v24, v25, v26, v27, v28, v29)\n[Op1ret#c3]                         return\n}\n\n\n[RexMp2fspillSib32#611,ss7]         v28 = spill v19\n[RexMp2fspillSib32#611,ss8]         v29 = spill v20\n[RexOp1call_r#20ff]                 call_indirect sig0, v2(v0, v1, v4, v5, v6, v7, v8, v9, v10, v11, v21, v22, v23, v24, v25, v26, v27, v28, v29)\n[Op1ret#c3]                         return\n}\n\n; 1 verifier error detected (see above). Compilation aborted.\n"))

Cleaned up a bit this yields:

<details>

    Finished dev [unoptimized + debuginfo] target(s) in 0.08s
     Running `target/debug/wasmtime --disable-cache call.wat --invoke foo 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3`
warning: using `--invoke` with a function that takes arguments is experimental and may break in the future
Error: failed to run main module `call.wat`

Caused by:
    0: failed to invoke `foo`
    1: trampoline error: WebAssembly failed to compile

       Caused by:
           Compilation error: function u0:0(i64 vmctx [%rdi], i64 [%rsi], i64 [%rdx], i64 [%rcx]) system_v {
               ss0 = outgoing_arg 4, offset 0
               ss1 = outgoing_arg 4, offset 8
               ss2 = outgoing_arg 4, offset 16
               ss3 = outgoing_arg 4, offset 24
               ss4 = outgoing_arg 4, offset 32
               ss5 = outgoing_arg 4, offset 40
               ss6 = outgoing_arg 4, offset 48
               ss7 = outgoing_arg 4, offset 56
               ss8 = outgoing_arg 4, offset 64
               sig0 = (i64 vmctx [%rdi], i64 [%rsi], f32 [%xmm0], f32 [%xmm1], f32 [%xmm2], f32 [%xmm3], f32 [%xmm4], f32 [%xmm5], f32 [%xmm6], f32 [%xmm7], f32 [0], f32 [8], f32 [16], f32 [24], f32 [32], f32 [40], f32 [48], f32 [56], f32 [64]) system_v

                                           block0(v0: i64 [%rdi], v1: i64 [%rsi], v2: i64 [%rdx], v3: i64 [%rcx]):
           [RexMp2fld#610,%xmm0]               v4 = load.f32 notrap aligned v3
           [RexMp2fldDisp8#610,%xmm1]          v5 = load.f32 notrap aligned v3+16
           [RexMp2fldDisp8#610,%xmm2]          v6 = load.f32 notrap aligned v3+32
           [RexMp2fldDisp8#610,%xmm3]          v7 = load.f32 notrap aligned v3+48
           [RexMp2fldDisp8#610,%xmm4]          v8 = load.f32 notrap aligned v3+64
           [RexMp2fldDisp8#610,%xmm5]          v9 = load.f32 notrap aligned v3+80
           [RexMp2fldDisp8#610,%xmm6]          v10 = load.f32 notrap aligned v3+96
           [RexMp2fldDisp8#610,%xmm7]          v11 = load.f32 notrap aligned v3+112
           [RexMp2fldDisp32#610,%xmm8]         v12 = load.f32 notrap aligned v3+128
           [RexMp2fldDisp32#610,%xmm9]         v13 = load.f32 notrap aligned v3+144
           [RexMp2fldDisp32#610,%xmm10]        v14 = load.f32 notrap aligned v3+160
           [RexMp2fldDisp32#610,%xmm11]        v15 = load.f32 notrap aligned v3+176
           [RexMp2fldDisp32#610,%xmm12]        v16 = load.f32 notrap aligned v3+192
           [RexMp2fldDisp32#610,%xmm13]        v17 = load.f32 notrap aligned v3+208
           [RexMp2fldDisp32#610,%xmm14]        v18 = load.f32 notrap aligned v3+224
           [RexMp2fldDisp32#610,%xmm15]        v19 = load.f32 notrap aligned v3+240
           [RexOp1rmov#8089]                   regmove v3, %rcx -> %rax
           [RexOp2frmov#428]                   regmove
[message truncated]

Last updated: Dec 23 2024 at 12:05 UTC