Stream: git-cranelift

Topic: cranelift / Issue #1311 panicked at 'Can't narrow load'


view this post on Zulip GitHub (Dec 25 2019 at 11:57):

bjorn3 opened Issue #1311:

Thanks for opening a bug report on Cranelift! Please answer the questions below
if they're relevant and delete this text before submitting.

test compile
set is_pic
target x86_64-unknown-linux-gnu

function u0:0(i64, i64, i64) system_v {
; symbol _ZN4core9core_arch3x864sse212_mm_add_epi817h36feb8477a42339bE

    ss0 = explicit_slot 16
    ss1 = explicit_slot 16
    ss2 = explicit_slot 16
    ss3 = explicit_slot 16
    ss4 = explicit_slot 16
    sig0 = (i64, i64) system_v
    sig1 = (i64, i64) system_v
    fn0 = colocated u0:257 sig0
    fn1 = colocated u0:257 sig1

                                ebb0(v0: i64, v1: i64, v2: i64):
                                    v3 = load.i64x2 v1
                                    v5 -> v3
                                    v4 = load.i64x2 v2
                                    v9 -> v4
                                    jump ebb1

                                ebb1:
@0001                               v6 = stack_addr.i64 ss3
@0001                               store.i64x2 v5, v6
@0001                               v7 = stack_addr.i64 ss3
@0001                               v8 = stack_addr.i64 ss1
@0001                               call fn0(v8, v7)
@0001                               jump ebb2

                                ebb2:
@0004                               v10 = stack_addr.i64 ss4
@0004                               store.i64x2 v9, v10
@0004                               v11 = stack_addr.i64 ss4
@0004                               v12 = stack_addr.i64 ss2
@0004                               call fn1(v12, v11)
@0004                               jump ebb3

                                ebb3:
@0000                               v13 = stack_addr.i64 ss1
@0000                               v14 = load.i8x16 v13
@0000                               v15 = stack_addr.i64 ss2
@0000                               v16 = load.i8x16 v15
@0000                               v17 = iadd v14, v16
@0000                               v18 = stack_addr.i64 ss0
@0000                               store v17, v18
@0000                               jump ebb4

                                ebb4:
@0008                               v19 = stack_addr.i64 ss0
@0008                               v20 = load.i64 aligned v19
@0008                               store aligned v20, v0
@0008                               v21 = load.i64 aligned v19+8
@0008                               store aligned v21, v0+8
@0008                               jump ebb5

                                ebb5:
@0008                               nop
@000a                               return
}

Expected successful compilation. Got:

thread 'rustc' panicked at 'Can't narrow load', src/libcore/option.rs:1188:5
stack backtrace:
[...]
  14: core::option::expect_failed
             at src/libcore/option.rs:1188
  15: core::option::Option<T>::expect
             at /rustc/9ae6cedb8d1e37469be1434642a3e403fce50a03/src/libcore/option.rs:348
  16: cranelift_codegen::legalizer::narrow_load
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:604
  17: cranelift_codegen::legalizer::narrow
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalizer.rs:2298
  18: cranelift_codegen::legalizer::narrow_flags
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalizer.rs:2416
  19: cranelift_codegen::isa::x86::enc_tables::x86_narrow
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalize-x86.rs:1514
  20: cranelift_codegen::legalizer::legalize_inst
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:120
  21: cranelift_codegen::legalizer::legalize_function
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:170
  22: cranelift_codegen::context::Context::legalize
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/context.rs:277
  23: cranelift_codegen::context::Context::compile
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/context.rs:144
  24: cranelift_module::module::Module<B>::define_function
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-module/src/module.rs:552

722a345ff6ee00ade5de87eef0a605711a88e8ec

x86_64. No SIMD related flags modified.

view this post on Zulip GitHub (Dec 25 2019 at 11:57):

bjorn3 labeled Issue #1311:

Thanks for opening a bug report on Cranelift! Please answer the questions below
if they're relevant and delete this text before submitting.

test compile
set is_pic
target x86_64-unknown-linux-gnu

function u0:0(i64, i64, i64) system_v {
; symbol _ZN4core9core_arch3x864sse212_mm_add_epi817h36feb8477a42339bE

    ss0 = explicit_slot 16
    ss1 = explicit_slot 16
    ss2 = explicit_slot 16
    ss3 = explicit_slot 16
    ss4 = explicit_slot 16
    sig0 = (i64, i64) system_v
    sig1 = (i64, i64) system_v
    fn0 = colocated u0:257 sig0
    fn1 = colocated u0:257 sig1

                                ebb0(v0: i64, v1: i64, v2: i64):
                                    v3 = load.i64x2 v1
                                    v5 -> v3
                                    v4 = load.i64x2 v2
                                    v9 -> v4
                                    jump ebb1

                                ebb1:
@0001                               v6 = stack_addr.i64 ss3
@0001                               store.i64x2 v5, v6
@0001                               v7 = stack_addr.i64 ss3
@0001                               v8 = stack_addr.i64 ss1
@0001                               call fn0(v8, v7)
@0001                               jump ebb2

                                ebb2:
@0004                               v10 = stack_addr.i64 ss4
@0004                               store.i64x2 v9, v10
@0004                               v11 = stack_addr.i64 ss4
@0004                               v12 = stack_addr.i64 ss2
@0004                               call fn1(v12, v11)
@0004                               jump ebb3

                                ebb3:
@0000                               v13 = stack_addr.i64 ss1
@0000                               v14 = load.i8x16 v13
@0000                               v15 = stack_addr.i64 ss2
@0000                               v16 = load.i8x16 v15
@0000                               v17 = iadd v14, v16
@0000                               v18 = stack_addr.i64 ss0
@0000                               store v17, v18
@0000                               jump ebb4

                                ebb4:
@0008                               v19 = stack_addr.i64 ss0
@0008                               v20 = load.i64 aligned v19
@0008                               store aligned v20, v0
@0008                               v21 = load.i64 aligned v19+8
@0008                               store aligned v21, v0+8
@0008                               jump ebb5

                                ebb5:
@0008                               nop
@000a                               return
}

Expected successful compilation. Got:

thread 'rustc' panicked at 'Can't narrow load', src/libcore/option.rs:1188:5
stack backtrace:
[...]
  14: core::option::expect_failed
             at src/libcore/option.rs:1188
  15: core::option::Option<T>::expect
             at /rustc/9ae6cedb8d1e37469be1434642a3e403fce50a03/src/libcore/option.rs:348
  16: cranelift_codegen::legalizer::narrow_load
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:604
  17: cranelift_codegen::legalizer::narrow
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalizer.rs:2298
  18: cranelift_codegen::legalizer::narrow_flags
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalizer.rs:2416
  19: cranelift_codegen::isa::x86::enc_tables::x86_narrow
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalize-x86.rs:1514
  20: cranelift_codegen::legalizer::legalize_inst
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:120
  21: cranelift_codegen::legalizer::legalize_function
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:170
  22: cranelift_codegen::context::Context::legalize
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/context.rs:277
  23: cranelift_codegen::context::Context::compile
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/context.rs:144
  24: cranelift_module::module::Module<B>::define_function
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-module/src/module.rs:552

722a345ff6ee00ade5de87eef0a605711a88e8ec

x86_64. No SIMD related flags modified.

view this post on Zulip GitHub (Dec 25 2019 at 12:00):

bjorn3 commented on Issue #1311:

Same with enable_simd enabled.

view this post on Zulip GitHub (Dec 25 2019 at 12:20):

bjorn3 commented on Issue #1311:

The panic is at https://github.com/bytecodealliance/cranelift/blob/7a4957ca07b5c87548473a00cadc166021e6c9e1/cranelift-codegen/src/legalizer/mod.rs#L604

view this post on Zulip GitHub (Feb 28 2020 at 23:28):

alexcrichton transferred Issue #1311:

Thanks for opening a bug report on Cranelift! Please answer the questions below
if they're relevant and delete this text before submitting.

test compile
set is_pic
target x86_64-unknown-linux-gnu

function u0:0(i64, i64, i64) system_v {
; symbol _ZN4core9core_arch3x864sse212_mm_add_epi817h36feb8477a42339bE

    ss0 = explicit_slot 16
    ss1 = explicit_slot 16
    ss2 = explicit_slot 16
    ss3 = explicit_slot 16
    ss4 = explicit_slot 16
    sig0 = (i64, i64) system_v
    sig1 = (i64, i64) system_v
    fn0 = colocated u0:257 sig0
    fn1 = colocated u0:257 sig1

                                ebb0(v0: i64, v1: i64, v2: i64):
                                    v3 = load.i64x2 v1
                                    v5 -> v3
                                    v4 = load.i64x2 v2
                                    v9 -> v4
                                    jump ebb1

                                ebb1:
@0001                               v6 = stack_addr.i64 ss3
@0001                               store.i64x2 v5, v6
@0001                               v7 = stack_addr.i64 ss3
@0001                               v8 = stack_addr.i64 ss1
@0001                               call fn0(v8, v7)
@0001                               jump ebb2

                                ebb2:
@0004                               v10 = stack_addr.i64 ss4
@0004                               store.i64x2 v9, v10
@0004                               v11 = stack_addr.i64 ss4
@0004                               v12 = stack_addr.i64 ss2
@0004                               call fn1(v12, v11)
@0004                               jump ebb3

                                ebb3:
@0000                               v13 = stack_addr.i64 ss1
@0000                               v14 = load.i8x16 v13
@0000                               v15 = stack_addr.i64 ss2
@0000                               v16 = load.i8x16 v15
@0000                               v17 = iadd v14, v16
@0000                               v18 = stack_addr.i64 ss0
@0000                               store v17, v18
@0000                               jump ebb4

                                ebb4:
@0008                               v19 = stack_addr.i64 ss0
@0008                               v20 = load.i64 aligned v19
@0008                               store aligned v20, v0
@0008                               v21 = load.i64 aligned v19+8
@0008                               store aligned v21, v0+8
@0008                               jump ebb5

                                ebb5:
@0008                               nop
@000a                               return
}

Expected successful compilation. Got:

thread 'rustc' panicked at 'Can't narrow load', src/libcore/option.rs:1188:5
stack backtrace:
[...]
  14: core::option::expect_failed
             at src/libcore/option.rs:1188
  15: core::option::Option<T>::expect
             at /rustc/9ae6cedb8d1e37469be1434642a3e403fce50a03/src/libcore/option.rs:348
  16: cranelift_codegen::legalizer::narrow_load
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:604
  17: cranelift_codegen::legalizer::narrow
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalizer.rs:2298
  18: cranelift_codegen::legalizer::narrow_flags
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalizer.rs:2416
  19: cranelift_codegen::isa::x86::enc_tables::x86_narrow
             at ./target/debug/build/cranelift-codegen-a4c45f6e6e5e34c4/out/legalize-x86.rs:1514
  20: cranelift_codegen::legalizer::legalize_inst
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:120
  21: cranelift_codegen::legalizer::legalize_function
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/legalizer/mod.rs:170
  22: cranelift_codegen::context::Context::legalize
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/context.rs:277
  23: cranelift_codegen::context::Context::compile
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-codegen/src/context.rs:144
  24: cranelift_module::module::Module<B>::define_function
             at /home/bjorn/.cargo/git/checkouts/cranelift-e5a6a40e8f744a9d/722a345/cranelift-module/src/module.rs:552

722a345ff6ee00ade5de87eef0a605711a88e8ec

x86_64. No SIMD related flags modified.


Last updated: Oct 23 2024 at 20:03 UTC