Stream: wasmtime

Topic: partially out-of-bounds writes on arm and riscv


view this post on Zulip Dan Gohman (Oct 17 2023 at 17:08):

@fitzgen (he/him) @Chris Fallin On the out-of-bounds writes issue, one thing I haven't seen mentioned anywhere yet is the component model's lockdown mode, which ensures that instances aren't re-entered after a trap. I think that means that components could just always use guard pages, regardless of microarchitecture or spec changes.

view this post on Zulip fitzgen (he/him) (Oct 17 2023 at 17:09):

modulo core dumps and post-mortem debugging, yeah that makes sense

view this post on Zulip Dan Gohman (Oct 17 2023 at 17:17):

yeah

view this post on Zulip Dan Gohman (Oct 17 2023 at 17:21):

Also, a variation of Chris' throwaway load technique would be to do a byte store to the greatest address that the actual store will write to.


Last updated: Dec 23 2024 at 13:07 UTC