Stream: cranelift

Topic: isle organisation


view this post on Zulip Sam Parker (Nov 23 2021 at 13:48):

Hi,
I've been re-implementing my flexible vector hacks using isle, and I'm enjoying the DSL, but I'm wondering if there's any technical obstacle to organising the isle files by architecture features, so for aarch64: (1) scalar (2) Neon (3) SVE? I'm assuming it would be possible but would it be pretty? I'd like to have a logic separation but avoid duplicating much code.

view this post on Zulip Alex Crichton (Nov 23 2021 at 15:07):

AFAIK this would be quite easy to do, it'd basically just be an edit to cranelift's build script to add in one more *.isle file and then you'd add contents as usual. I believe there's just one "namespace" right now so the division into files is purely for humans

view this post on Zulip Sam Parker (Nov 23 2021 at 15:19):

Okay, thanks, I'll give it a go.

view this post on Zulip Sam Parker (Nov 23 2021 at 15:27):

Yep, that worked nicely! Thanks again

view this post on Zulip Chris Fallin (Nov 23 2021 at 18:18):

@Sam Parker happy to hear things are working out for you with the DSL! We're working on documenting stuff now, so if there are any non-obvious or confusing bits, feedback is especially useful :-)

view this post on Zulip Sam Parker (Nov 24 2021 at 08:50):

It seems fairly intuitive so far, especially with the existing work in the aarch64 and x64 backends to look at. I'm feeling much more productive than when I first used tablegen for sure :)

view this post on Zulip Sam Parker (Nov 24 2021 at 09:51):

And my only gripe so far is that the DSL makes the encoding and register mapping process feel even more laborious and clumsy than before! I get to write some concise pattern matching and then have to revert to copy-paste some rust code in different places. Do you think there's a possible route to extend isle to handle some of the details of the instruction descriptions..?

view this post on Zulip Chris Fallin (Nov 24 2021 at 16:31):

@Sam Parker yes, the plan is to cover those with some automated codegen as well; @fitzgen (he/him) is planning on doing something with some yaml/toml-to-Rust magic so we can say "inst X with these fields, reads this reg, writes this reg"

view this post on Zulip Chris Fallin (Nov 24 2021 at 16:32):

not a full DSL but more like a schema description with metadata

view this post on Zulip Sam Parker (Nov 24 2021 at 16:38):

Ah, wonderful!


Last updated: Dec 23 2024 at 12:05 UTC