Do I need to explicitly run optimization passes in some way? The generated amd64 assembly I'm getting is like, comically inefficient
You can set the opt_level
option to speed_and_size
when building the TargetIsa.
Also in what kind of way is it inefficient?
@Nathan Ringo ^
er, if I'm using SimpleJIT, where would I be building the TargetIsa? (I think it uses native or whatever)
There's a bunch of mov rdi, 0; mov rsi, rdi
and there's no direct calls at all; only mov rcx, number; jmp rcx
which by my understanding is significantly less efficient
like, for example, in https://github.com/bytecodealliance/simplejit-demo/blob/main/src/jit.rs
Those kinds of inefficiencies are coming from regalloc. Cranelift is currently switching to a new framework for backends. This includes a regalloc that shouldn't do this. For aarch64 it is the default (and only) backend. For x86_64 you have to enable it using the experimental_x64 feature flag.
@Nathan Ringo ^
The mov; jmp by the way is because is_pic is not enabled by default. x86_64 doesn't allow 64bit immediates for calls.
You can use a custom TargetIsa instead of the native one by using with_isa
instead of new
for the jit builder.
Okay, I'll look at those, thanks
hm, am I correct in thinking that experimental_x64
is only available in the Git version of Cranelift? It doesn't appear to exist in the released 0.68.0 despite being in the wasmtime repo...
That is possible.
Last updated: Dec 23 2024 at 13:07 UTC