Stream: cranelift

Topic: F32X8 Type fails lane width assertion on aarch64


view this post on Zulip Finn H (Feb 17 2025 at 13:42):

I am trying to JIT-compile a function that takes an F32X16, multiplies it with itself and returns the result.
The IR looks like this:

function u0:0(f32x16) -> f32x16 system_v {
block0(v0: f32x16):
    v1 = fmul v0, v0
    return v1
}

But when i try to call JITModule::define_functions an assertion fails within the rc_for_type function.
The backtrace looks like this:

thread 'it_works_x16' panicked at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/isa/x64/inst/mod.rs:2837:17:
assertion failed: ty.bits() <= 128
stack backtrace:
   0: rust_begin_unwind
             at /rustc/d8810e3e2dab96778d20dd6d746ff95465515509/library/std/src/panicking.rs:695:5
   1: core::panicking::panic_fmt
             at /rustc/d8810e3e2dab96778d20dd6d746ff95465515509/library/core/src/panicking.rs:75:14
   2: core::panicking::panic
             at /rustc/d8810e3e2dab96778d20dd6d746ff95465515509/library/core/src/panicking.rs:145:5
   3: cranelift_codegen::isa::x64::inst::<impl cranelift_codegen::machinst::MachInst for cranelift_codegen::isa::x64::lower::isle::generated_code::MInst>::rc_for_type
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/isa/x64/inst/mod.rs:2837:17
   4: <cranelift_codegen::isa::x64::abi::X64ABIMachineSpec as cranelift_codegen::machinst::abi::ABIMachineSpec>::compute_arg_locs
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/isa/x64/abi.rs:172:34
   5: cranelift_codegen::machinst::abi::SigSet::from_func_sig
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/machinst/abi.rs:857:42
   6: cranelift_codegen::machinst::abi::SigSet::make_abi_sig_from_ir_signature
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/machinst/abi.rs:790:24
   7: cranelift_codegen::machinst::abi::SigSet::new
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/machinst/abi.rs:759:9
   8: cranelift_codegen::isa::x64::X64Backend::compile_vcode
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/isa/x64/mod.rs:59:20
   9: <cranelift_codegen::isa::x64::X64Backend as cranelift_codegen::isa::TargetIsa>::compile_function
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/isa/x64/mod.rs:73:40
  10: cranelift_codegen::context::Context::compile_stencil
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/context.rs:138:9
  11: cranelift_codegen::context::Context::compile
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-codegen-0.116.1/src/context.rs:204:23
  12: <cranelift_jit::backend::JITModule as cranelift_module::module::Module>::define_function_with_control_plane
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-jit-0.116.1/src/backend.rs:705:19
  13: cranelift_module::module::Module::define_function
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-module-0.116.1/src/module.rs:952:9
  14: <alloc::boxed::Box<M> as cranelift_module::module::Module>::define_function
             at /~/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cranelift-module-0.116.1/src/module.rs:1169:9
  15: anita_core::jit::JIT<T,F>::compile
             at ./anita_core/src/jit/mod.rs:167:9
  16: simd::it_works_x16
             at ./tests/simd.rs:18:20
  17: simd::it_works_x16::{{closure}}
             at ./tests/simd.rs:17:18
  18: core::ops::function::FnOnce::call_once
             at /~/.rustup/toolchains/nightly-x86_64-unknown-linux-gnu/lib/rustlib/src/rust/library/core/src/ops/function.rs:250:5
  19: core::ops::function::FnOnce::call_once
             at /rustc/d8810e3e2dab96778d20dd6d746ff95465515509/library/core/src/ops/function.rs:250:5
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.

does that mean there is no RegClass for any other simd registers than xmm? Or could it be i missed something when setting up my JIT?
If there is any other information i can provide please let me know

edit: everything works as expected when using F32X4 instead.


Last updated: Feb 27 2025 at 23:03 UTC