Stream: general

Topic: What is x0 and x1 used for on arm64 with CallConv::TAIL?


view this post on Zulip Tianyu Geng (Dec 23 2023 at 22:34):

Compiling bar(x: i64) { x + 1 } yields the following assembly code on ARM64 with tail call convention. It looks like first argument is passed via register x2 and return value is also x2. So I am curious what is x0 and x1 used for in this case?

0000000000000000 <_bar>:
       0: d503235f      pacibz
       4: a9bf7bfd      stp     x29, x30, [sp, #-16]!
       8: 910003fd      mov     x29, sp
       c: 91000442      add     x2, x2, #1
      10: a8c17bfd      ldp     x29, x30, [sp], #16
      14: d50323df      autibz
      18: d65f03c0      ret

view this post on Zulip Chris Fallin (Dec 23 2023 at 23:06):

this comment answers your question, I think!

view this post on Zulip Tianyu Geng (Dec 23 2023 at 23:13):

Thank you! What is return area pointer? Also, why does indirect call need a devoted register like so? Can't the callee address be stored in a scratch register like x16?

view this post on Zulip Chris Fallin (Dec 24 2023 at 01:04):

The "return area pointer" is used in some ABIs when a value larger than can fit in a register is returned

view this post on Zulip Chris Fallin (Dec 24 2023 at 01:05):

Re: scratch, I'm not sure exactly, but it might have to do with the fact that x16 is already reserved for lowering address/offset-generation sequences, and so is required at a "lower level" (to implement spills/reloads that may fill in registers for the tail call)

view this post on Zulip Chris Fallin (Dec 24 2023 at 01:06):

@fitzgen (he/him) could probably say more about the implementation as he drove the effort

view this post on Zulip Tianyu Geng (Dec 24 2023 at 01:09):

Thanks! For my purpose I am just trying to implement exception handler to resume operation after handling an exception. So it sounds like I do not care about values in these registers when restoring execution states.


Last updated: Nov 22 2024 at 16:03 UTC