✔ risc-v atomic i8 i16. · general

Stream: general

Topic: ✔ risc-v atomic i8 i16.

yang yu (Aug 22 2022 at 04:41):

if a target didn't support i8 or i16 is that ok to use i32 instructions .
I mean if you use sc.wto implement i8 store operation, you may overwrite some data.
https://msyksphinz-self.github.io/riscv-isadoc/html/rva.html#sc-w

bjorn3 (Aug 22 2022 at 06:46):

If you do lr.w and then sc.w on the same address, with the bytes that need to stay the same unchanged, then there will be no overwite with a different value than the correct one as the sc.w would fail if another thread overwrites the other bytes.

bjorn3 (Aug 22 2022 at 06:46):

At least that is how I understand it. You can always look at what LLVM does.

yang yu (Aug 22 2022 at 09:43):

@bjorn3 my main concern is if only alloc 2 bytes for i16 , I do sc.w may overwirte arbitrary data.

bjorn3 (Aug 22 2022 at 09:49):

This is how LLVM codegens it: https://rust.godbolt.org/z/hb8s9EWYT

Compiler Explorer - Rust (rustc 1.63.0)

use std::sync::atomic::*; pub fn foo(a: &AtomicU8) { a.fetch_add(1, Ordering::SeqCst); }

Afonso Bordado (Aug 22 2022 at 09:49):

As long as you preserve the top two bytes and then re-write them, it should work out. Here's what llvm does: https://godbolt.org/z/eW8Gv115o

Compiler Explorer - Rust (rustc 1.63.0)

use std::sync::atomic::{AtomicU16, Ordering}; pub fn square(num: u16) -> u16 { let mut a = AtomicU16::new(42); a.fetch_add(num, Ordering::SeqCst); a.load(Ordering::SeqCst) }

bjorn3 (Aug 22 2022 at 09:52):

I think LLVM also does some trickery to exactly align the load and store to a 32bit boundary as necessary for performance (unaligned atomics may need to be emulated by machine mode) and correctness (oversized memory accesses may cause erroneous page faults if the memory are at the end of a page) reasons.

bjorn3 (Aug 22 2022 at 09:56):

This is the actual code in LLVM that does the atomic rmw handling: https://github.com/llvm/llvm-project/blob/ce381281940fb6a9cc2fa1a16fa36bf0911f43f1/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp#L341

llvm-project/RISCVExpandAtomicPseudoInsts.cpp at ce381281940fb6a9cc2fa1a16fa36bf0911f43f1 · llvm/llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at...

yang yu (Aug 22 2022 at 09:57):

@bjorn3 thanks.

Notification Bot (Aug 23 2022 at 07:17):

yang yu has marked this topic as resolved.

Last updated: Dec 23 2024 at 12:05 UTC